Model
3360-P
VLSI Test System
Bridging Design To Production
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Key Features
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- 50 MHz
- 256 logic I/O pins
- 8~16 M Pattern Memory
- Flexible configuration (Interchangeable I/O, UVI, ADDA, and LCD)
- Parallel testing up to 32 devices
- Real parallel Trim/Match function
- Time & Frequency Measurement Unit (TFMU)
- Test program/pattern converter (V7, TRI6020, V50, E320, SC312, D10, J750, ITS9K, TS670, ND1)
- AD/DA card option (16 bit~24bit)
- SCAN test option (512M)
- ALPG test option for memory
- STDF tools support
- User friendlyWindows XP environment
- CRAFT C/C++ programming language
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The Full Functions - Logic, LCD, LED, ADDA, Power, ALPG, SCAN,Match... etc.
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Request a quote.
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All specifications are subject to change without notice
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