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VLSITestSystem
VLSI Test System
Model 3380D
  • 100 MHz clock rate, 256 I/O digital I/O pins
  • Up to 256 sites Parallel testing
  • Various VI source
  • Flexible HW-architecture (Interchangeable I/O, VI, ADDA)
VLSITestSystem
VLSI Test System
Model 3380P
  • 100Mhz clock rate, 512 I/O channels (Max to 576 pins)
  • Up to 512 sites Parallel testing
  • Various VI source
  • Flexible Architectures: Slot interchangeable I/O, ADDA, VI source
VLSITestSystem
VLSI Test System
Model 3380
  • 100Mhz clock rate, 1024 I/O channels (Max to 1280 pins)
  • Up to 1024 sites Parallel testing
  • Various VI source
  • Flexible Architectures: Slot interchangeable I/O, ADDA, VI source
UniversalRelayDriverControl
  • PXI Systems Alliance
Universal Relay Driver Control
Model 33011
  • PXIe based universal relay control
  • 32CH direct relay drivers
  • 2 lanes of SPI relay control interface
HighSpeedPXIeDigitalIOCard
  • PXI Systems Alliance
High Speed PXIe Digital IO Card
Model 33010
  • Standard PXIe bus connector
  • 100MHz maximum clock rate
  • 32 channels per board